Cryotron shift register



y 25, 1965 J. P. BEESLEY 3,185,862

CRYOTRON SHIFT REGISTER Filed May 29, 1961 RELATIVE AMPLITUDES OFSHIFT REGTSTER CURRENTS ['de 7 1/2 UNIT CURRENT 1 dc U2 UNIT CURRENT A PULSE V2 UNIT CURRENT B PULSE V2 UNIT CURRENT MINIMUM CURRENT GREATER THAN V2 UNIT CURRENT T0 SWITCH A GATE 6,8,T0,T2,ETC

29 15 a\\\\\\\ INVENTOR 18 JAMES P BEESLEY 15 lollllllllllge a. \mxxu l4 15 WWII/1m BY 15 MM I, [9M ATTORNEY United States Patent 0 3,135,862 CRYGTRGN SHIFT REGISTER James P. Beasley, Poughkeepsie, N.Y., assignor to International Business Machines Corporation, New Yorir, N.Y., a corporation of New York Filed May 29, 1961, Ser. No. 113,408 3 Claims. (Cl. 3tl7-88.5)

The present invention relates to superconductive devices and more particularly to such devices which are employed as shift registers.

Shift registers generally include a number of identical stages connected together in serial fashion. Each stage has a storage device and the stages are interconnected by transfer or coupling circuits. Information entered into one or more of the storage devices is advanced in stepby-step fashion along the chain in response to a series of shift pulses. In some shift registers it is customary to employ flip-flops as the storage elements. In superconductive shift registers, flip-flop circuits utilize cryotrons which are superconductive switching elements and each element comprises a superconductive straight wire surrounded by a coil Whose magnetic field controls the superconductive properties of the straight wire. Such cryotrons may be formed employing thin films wherein the straight wire and control coil are made of vacuum-deposited thin films of superconductive material deposited on a suitable substrate.

The cryogenic shift register shown and described herein includes six cryotrons per stage, said cryotrons being formed preferably by vacuum deposition of thin films. An input cryogenic flip-flop receives the binary bit of information. The entry of information into the flip-flop causes one gate of the flip-lop to go resistive, diverting a DC. current from a first path to a second path of such input flipdiop. Two gates of each stage form a permanent storage of binary information and two gates of the same stage form a temporary storage of such information. Each cryogenic storage element consists of two alternate paths for the flow of DC. current. It the current flows through one path, a l is stored, if through the alternate path, a O is stored. The stored current makes a partial selection of those gates which control the flow of 13.0. current in the following storage element. Two cryotrons are coupled to each stage to permit reset of the register.

Shift lines are employed for stepping the information stored in one stage to the next stage. The shift lines are so arranged that the stepping of information is accomplished by the application of a sine wave or pulses of alternating polarity to such shift lines. The shift line acts as an additional control line for all the cryotron gates in the register. Positive pulses applied to the shift lines will be additive to the current in the DC. controls for one set of gates but in opposition to the DC. controls for another set of gates. Negative pulses will have the converse effect. Consequently the shifting of information through a register can be accomplished using bipolar driving pulses. Moreover, as will be explained hereinafter, information can be entered into the register during the application of a drive pulse to the shift lines of the register.

It is an objectto provide a cryogenic shift register.

It is another object to provide a cryogenic shift register capable of being operated with bipolar shifting pulses.

It is yet another object to obtain a bipolar cryogenic shift register employing relatively few cryotrons per stage.

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.

FIG. 1 is a showing in schematic form of the novel shift register.

HG. 2 represents the current pulses employed as shift pulses in the novel cryogenic shift register.

FIG. 3 sets forth the relative current amplitudes of the shift register.

FIG. 4 is a crosssection, greatly enlarged, of a cryotron employed in the shift register.

In FIG. 1, gate 2- and gate 4 are the gates for storing binary information entering the shift register and gates 6, 8, N and 12 form the gates of the first stage of such register, gates ti, 8', 10' and 12 are the gates of the second register, three full stages being shown, it being understood that as many stages as desired can be employed. Gates R are employed as control gates for resetting the shift register. Gates lli and 12; of stage 1 and their corresponding gates in the other stages are the temporary storage gates of the shift register whereas gates 6 and 8 and their corresponding gates in other stages store the information after shifting. Obviously, if desired, gates 6 and 8 could be employed as the temporary storage gates with it) and 12 being designated as the information stor-age gates.

New information enters the shift register through input lines 14- and Tie. Lines 18 and 2d are the shift lines of the register and they carry shift pulses applied simultaneously to their respective input terminals 22 and 2 5. There are two DC. paths, namely, l and I that traverse the various gates of the shift register, I' being the gate current for input gates 2 and 4 and temporary storage gates l0, l2, l0, 12', etc. and such current can be traced as it flows from left to right through the shift register. I is the gate current for the shift register gates 6, 8, 6, 8', etc. I travels from right to left through the shift register. The DC. currents I' and I may be separate sources or they may emanate from the same source, their origins being immaterial to the spirit of the invention.

After the shift register is place in the correct temperature environment such as liquid helium, I and I' are applied to the shift register, and such currents divide inversely proportional to the inductances of the parallel paths through which they flow. This is the stage of the virgin shift register prior to entry of information into the register or the resetting of the register. After the application of the DC. curents, the register is reset by applying a current pulse to reset line 3, such pulse being of sufiicient magnitude to drive all the reset cryotrons R resistive. Such resistivity in cryotrons R will cause P to flow through gate 2, l8, l6, lltl etc. and current l to flow through 8, 8', 8", etc. In effect, the clearing of the register sets the temporary and permanent storage gates into their respective 0 states. Gates current I' flowing through all the upper temporary storage gates of the register and gate current I flowing through all the lower permanent storage gates represents the cleared state of the shift register once a reset pulse has been applied.

In describing the operation of the novel shift register it will be assumed that all currents are measured with respect to a unit current. The total drive current required t switch any of the gates 6, 8, 10 or 12, or their corresponding gates in the shift register from the super-conductive to resistive state, must be greater than /2 unit current. The DC. currents P and I are each /2. unit current. The shift pulses A or B that appear at terminals 22 and 24 each have an amplitude of'% unit current.

Assume that a bit of information enters the shift register through either input line 14 or 16. By definition, a pulse on line 14 will carry sufficient current to drive gate 2 from its superconductive state to its resistive state. Likewise, a pulse appearing on line 16 would drive gate 4 resistive. In following the operation of the shift register, it will be seen that the driving of gate 2 resistive would divert I' current through path 26 through superconductive gate 4. Full I current through gate 4 indicates that the new information entered into the register is a 1. If information enters the register as a current pulse on line 16, then gate 4- is resistive and I passes along path 28 through superconductive gate 2, indicating that a was written into the register.

, Assuming that a l was entered into theshift register and the remaining stages of the register contained 0 I' would go through gate 4, reset gate R and path 30. Immediately after the information is put into the shift register, shift pulses are applied simultaneously at terminals 22 and 24. The A pulse passes through shift lines 13 and 20 but only the A pulse through shift line 20 is additive to the /2 unit current bias flowing in linefitl to produce a current greater than /2 unit current. The combined 7 effect of current through shift line 20 and bias line 30 is suflicient to drive gate 3 resistive. All of l current passes through path 34 and line 31 to bias gate and pass through reset gate R and gate 6 on its way out through terminal 44. The passage of current through gate 6 indicates that the 1 read into the first temporary storage stage of the shift register has been shifted into the first permanent storage stage of the register. As soon 7' ground plane 13 of lead of order of 0.4 to 1.0 micron thick is deposited by vapor deposition techniques onto the glass substrate 11. A layer of silicon monoxide of the same order of thickness is deposited thereon. The gate 6 is tin and of the order of 0.4 to 1.0 micron thick can be made to be 50 to 1500 microns wide. After gate 6 has been deposited, a second layer of silicon monoxide 15 is deposited thereon. Path 29, for current 1' and shift line 18 are deposited as thin films of lead of the order 7 of 0.5 to 1.0 micron thick and are 12.5 to 250.0 microns wide. A final layer of silicon monoxide is deposited over control lines 18 and 29. Obviously other superconductive materials, insulators and film thicknesses can be employed in the construction of this shift register.

Although the preferred embodiment of the novel shift register employs thin films of superconductive material that areformed by vapor deposition techniques, the nature of the invention is such that the superconductive.

and scope of the invention.

as shift pulse A terminates, the negative pulse B is applied simultaneously to both terminals 22 and Gate 10 is now affected by the /2 amplitude current I biasing gate 10 and the /2 current amplitude pulse B appearing on shift line 18. The sum of these two A". currents is suflicient to drive gate 10 resistive which diverts current I' through superconductive gate 12. The 1 that was written into the shift register is now stored as a current I' flowing through gate 12. It is arbitrary as to whether gates 6 and 8 are chosen to be the gates that are the shift register gates for storing information or whether gates 10 and 12 are the gates for storing the information of the shift register. For an understanding of the invention it is immaterial whether one setof gates be used for ternporary storage and the other set be used for permanent storage of the contents of the shift register, so long as there is consistency once a choice has been made.

If desired, the output of the last stage of the shift reg .ister can be tied as an input to the first stage of the reg ister to produce a ring counter. Also, if desired, new information can enter the shift register along lines 14 and 16 after the terrnination'of shift pulses A and B, or.

or line 16,1}, current will either pass through .gate' 2' to apply full bias current to gate 6 or pass throughgate 4,to apply full bias current to gate 8, depending upon whether a 0 or a 1. was read into theregister. "Since a B pulse appearing on shift lines 18 and 2th causes-a current pulse through such lines'to be opposition to the full bias current being applied to either gate 6' or 8 when new information is read into-gate 2 or 4, neither gated or '8 can be affected if information entersthe register during What is claimed is:

'1. A shift register comprising a plurality of stages each of which includes four cry-otrons, control current-s'of a first land .a second cryotron of agiven stage serving as the gate current respectively of a third and a fourth cryotron of the previous stage and control currents of the third and fourth cryotrons of said previous stage serving as the gate current respectively of the first and second cryotrons of said previous stage, a first shift line connected to all the odd cryotrons serving as control lines thereto, a second 7 shift line connected to all the even cryotrons and serving as control lines thereto, means for simultaneously applymg bipolar current pulses to said shift lines, wherein current pulses of :one polarity are additive to said control currents of the first and second cryotrons but subtractive the'presence of a B shift pulse. Thus the novel register described herein permits information to be entered into the register even while the shifting of old'information 1n the register is taking place.

FIG. 4 depicts a preferred embodiment; of a cryotronin a" stage of the register and its associated circuitry. A

suitable substrate such as glass 11' will support all the elements shown in FIG. '1... Through, suitable masks, a.

from said control currents of the third and fourth cryo trons.

2. A shift register for shifting binary information con prising a plural-i-ty of stages each of which includes four cryotrons, a first pair of said cryot-rons serving as the actual storage of binary information continued in said register and a second pair of said cryotrons serving as the tern-' porary storage of binary information in said register, a source of direct current, said source serving as control currents for the binary information storage cryot-rons and gate current for the cry-otrons that temporarily store said binary'information, a second source of direct current wherein-the latter serves as control current for temporary information st-orage cryotrons and gate current for the 7 actual storage cryotrcns, said two dire-ct currents moving;

in oppositedirections through said shn'ft register, and shift lines applied as additional control lines for said cryotrons, 821d shrftalines carrying bipolar current pulses which in one polarity are additive to said control current of the actual information storage cryotrons but are subtractive from said control current of the temporary storage cryotrons, and vice versa 'in the other polarity.

3. Ash ift regist-er comprisinga plurality of stages each of which includes two pairs of c'ryotr-onsuone said pair consisting offirst and second cryctsons of the stage and the other pair consisting of third and fo-rth crpotrons thereof, control currents of said first and said second cryo- 7 tron of-a. given stage serving as the gate-current respectively of a third and a fourth 'cryotron of the previous stage and contnol currents of the third and fourth cryotrons of said previous stage serving as the gate current ISPC1 V tively of said first and second cryotrons of said previous stage;-a first shift line connected to all the odd numbered cryotrons and serving to carry control currenbs thereto, 9. References flied by ihe Examiner second shift 'lioe connected to all even oumbered cryo- UNITED STATES PATENTS irons and serving to carry control currents thereto, 521d shift lines being oriented to carry currents which are addi- 3302311 9/61 Dumm 3014385 tive to control currents of alternate pairs of said cryo srons 5 31019353 1/62 M'ackay 307 88-5 and subtractive from the others of said control currents 3,019,354 1/62 Anderson et 307-885 when *the shift line currents are of a first polarity, and vice versa when said shift line currents are of the op- GEORGE WhSTBY P r 1mm Examiner posite polarity. ARTHUR GAUSS, Examiner. 

1. A SHIFT REGISTER COMPRISING A PLUALITY OF STAGES EACH OF WHICH INCLUDES FOUR CRYOTRONS, CONTROL CURRENTS OF A FIRST AND A SECOND CRYOTRON OF A GIVEN STAGE SERVING AS THE GATE CURRENT RESPECTIVELY OF A THIRD AND A FOURTH CRYOTRON OF THE PREVIOUS STAGE AND CONTROL CURRENTS OF THE THIRD AND FOURTH CRYOTRONS OF SAID PREVIOUS STAGE SERVING AS THE GATE CURRENT RESPECTIVELY OF THE FIRST AND SECOND CRYOTRONS OF SAID PREVIOUS STAGE, A FIRST SHIFT LINE CONNECTED TO ALL THE ODD CRYOTRONS SERVING AS CONTROL LINES THERETO, A SECOND SHIFT LINE CONNECTED TO ALL THE EVEN CRYOTRONS AND SERVING AS CONTROL LINES THERETO, MEANS FOR SIMULTANEOUSLY APPLYING BIPOLAR CURRENT PULSES TO SAID SHIFT LINES, WHEREIN CURRENT PULSES OF ONE POLARITY ARE ADDITIVE TO SAID CONTROL CURRENTS OF THE FIRST AND SECOND CRYOTRONS BUT SUBTRACTIVE FROM SAID CONTROL CURRENTS OF THE THIRD AND FOURTH CRYOTRONS. 